1. Field of the Invention
The present invention relates to a master-slave flip-flop arrangement, particularly a clock-controlled arrangement which may be employed in large scale integration modules with standard, diffused basic structures, in which, in addition to resistors, contains a supply of transistors having identical emitters, a master flip-flop and a slave flip-flop each constructed of series-coupled current switches with emitter-coupled transistors, in which, in each storage element, there is provided in the collector circuits of the transistors of a lower current switch which is controlled by a clock, a respective further upper current switch for receiving and inputing data, and in which the first and second storage elements are oppositely circuited and provided with mutual displacement of the switching thresholds through the provision of parallel-connected transistors or, a plurality of transistors functioning as diodes.
2. Description of the Prior Art
A master-slave flip-flop has two storage elements of which one is respectively in the storing state while the other is switched to a data receiving state. A common clock input is provided for both storage elements. Upon the occurrence of a clock pulse, the first storage element stores the information pending at the data input and the second storage element is blocked. A change of the information during a clock pulse causes the new information to be stored in the first storage element. At the end of the clock pulse, the first storage element is blocked with respect to further information input and the second storage element receives the information last stored in the first storage element.
The correct switching operation of a master-slave flip-flop is guaranteed when the switching process, triggered by means of the clock pulse, sequences somewhat later in that storage element which is to receive information than in the storage element which is to store the information. The time difference must be sufficiently large that the acceptance of the information previously stored by the first storage element into the second storage element is terminated before a new information arrives at the first storage element. Since the clock pulses always have more or less straight leading and trailing edges, the necessary time differences can be achieved by a mutual displacement of the switching thresholds of the switching elements in the two storage elements which are directly controlled by the clock. In the following, only master-slave flip-flops are considered which are designed in current-switching technology, also known as emitter-coupled logic (ECL or E.sup.2 CL) technology. In known circuits of this type, use is made of series coupling in both storage elements (cf. Data Sheet MC 10131, Motorola Inc., 3rd Edition, September 1973, p. 3/85, fully incorporated herein by this reference). In the known circuit arrangement, the different switching thresholds are generated by a displacement of the reference voltage for the lower current switch of a storage element, directly controlled by the clock, by a small amount with respect to a standard value. Making reference voltages available which deviate from internal module standard values, however, requires special components. Such special components, however, are not generally available in highly integrated modules, in which one proceeds from a constant supply of modules for the formation of different circuit complexes, for reasons of rational production. At least in the inner area of such modules, subdivided into cells having identical basic structures, and reserved for the formation of logic circuits and the appertaining reference voltage sources (bias drivers), the transistors of the component supply have identical emitter surfaces. At most, the transistors differ by the number of emitters. The supply of ohmic resistors is likewise limited to a few specific values which are adapted to the intended circuit technology and, in conjunction with the transistor supply, permit realization of all essential linkage functions with a high degree of exploitation of the available components.